Formal Verification of Simulink/Stateflow Diagrams

This book presents a state-of-the-art technique for formal verification of continuous-time Simulink/Stateflow diagrams, featuring an expressive hybrid system modelling language, a powerful specification logic and deduction-based verification approach, and some impressive, realistic case studies.  Readers will learn the HCSP/HHL-based deductive method and the use of corresponding tools for formal verification of Simulink/Stateflow diagrams. They will also gain some basic ideas about fundamental elements of formal methods such as formal syntax and semantics, and especially the common techniques applied in formal modelling and verification of hybrid systems. By investigating the successful case studies, readers will realize how to apply the pure theory and techniques to real applications, and hopefully will be inspired to start to use the proposed approach, or even develop their own formal methods in their future work.

Dr. Naijun Zhan is a research professor at State Key Lab. of Computer Science, Institute of Software, Chinese Academy of Sciences. He obtained PhD in computer science from Institute of Software, Chinese Academy of Sciences in 2000, and Ms.c in computer science and Bs.c in mathematical logic both from Nanjing University respectively in 1996 and in 1993. Prior to join Institute of Software, Chinese Academy of Sciences, he worked at Faculty of Mathematics and Informatics, University of Mannheim, Germany from 2001 to 2004.